(1) Field of the Invention
The invention relates to an improved buried contact for VLSI devices and to the method for forming the buried contact. The buried contact of this invention is formed without an unwanted silicon trench after buried contact etching. By using trenched isolation and a trench polysilicon gate the buried contact can be formed without the trench problem.
(2) Description of Related Art
As circuit density continues to increase buried contacts are used for local interconnection to minimize chip area. However, a problem with buried contact processes in use today is the formation of a silicon trench after buried contact etching. This unwanted trench results in junction leakage current as well as subsequent planarization problems.
This invention uses trenched isolation and a trenched polysilicon gate to form buried contacts in the fabrication of VLSI devices. This invention results in reduced contact resistance, improved wafer planarization before metal deposition, and improved diffusion junctions. U.S. Pat. No. 5,216,282 to Cotes et al teaches the use of contact studs and has a self alignment technique with contact studs. U.S. Pat. No. 5,196,368 to Thompson et al shows etch and refill technology in general. Performance of trench or grooved gate structures are discussed in "Simulation of Sub-0.1-um MOSFET's with Completely Suppressed Short-Channel Effect," by Tanaka et al in IEEE Electron Device Letters, August 1993.